1. Field of the Invention
The invention relates to computer architectures, and more particularly to means for accommodating various ordering schemes for the storage of information.
2. Description of Related Art
Data is organized in modern computers in either of two formats or in some combination of those formats. The formats are known as "big endian", in which the high order bit, byte or other unit of information is located in the lower numbered unit address, and "little endian," in which the high order unit of information is located in the higher numbered unit address. See Cohen, "On Holy Wars and a Plea for Peace," Computer, 10/81, pp. 48-54, which contains a good discussion of the data organization problem. Thus, in a true big endian computer architecture, bits of data are thought of as being lined up from left to right, the lowest numbered and most significant bit being on the right. When this string of bits is divided into, for example, 8-bit bytes, 16-bit halfwords and/or 32-bit words, the lowest numbered and most significant byte, halfword or word continues to be located on the left. In a true little endian architecture, the scheme is exactly the opposite. Bits, bytes, halfwords and words are numbered right to left, the least significant bit, byte, halfword or word being located on the right. Within a given computer, or within a given functional unit (such as a CPU) within a computer, it makes no difference which scheme is chosen because all the hardware and software can be designed around the chosen scheme. The difference becomes important when one computer or functional unit communicates with another, the data ordering scheme of which is not known. This is because information which is transmitted from the lowest numbered unit to the highest numbered unit will be most significant to least significant under the big endian scheme, but least significant to most significant under the little endian scheme.
In many modern computers, the smallest addressable unit of information (i.e., the smallest group of bits which one computer or functional unit may receive from, transmit to or refer to in another) is a byte. This eases the data ordering conflict because all the bits in the byte may be transmitted in parallel. Whereas the bits in the byte may be numbered differently for different data ordering schemes, the least significant bit is always on the right. The different data ordering schemes for such computers are therefore functionally identical for informational units smaller than a byte. However, it is still necessary to be concerned about byte, halfword and word ordering.
Also, it should be noted that some computers implement a mixed data ordering scheme. In these computers, words and larger units, for example, may have a big endian ordering, whereas halfwords, bytes and bits may have a little endian ordering. This adds complexity because on multiword transmissions of data it becomes necessary to know both that the first word is the high order word, and also that the first byte of that word is the low order byte.
The data ordering problem is particularly important to manufacturers of chip- and board-level microcomputer based products which are specific to a chosen data ordering scheme, such as CPU's. The conflict is not as important for other products, such as memory, because such products are usable without modification with any ordering scheme.
Manufacturers of chip- and board-level products typically intend their products to be incorporated into a computer with other chip- or board-level products of other manufacturers which may use a different data ordering scheme. Manufacturers therefore have, in the past, designed their products according to one data ordering scheme and marketed them only to customers with a compatible architecture. This effectively halves the manufacturer's available market. As an alternative, some manufacturers make and sell two versions of every product which needs a predefined data ordering scheme, one for each type of architecture. This solution is also unsatisfactory, however, because it requires the manufacturer to design, manufacture and maintain inventory on twice as many products. It also prevents the manufacturer from taking full advantage of the economies of scale, because only half the production volume of each version can be expected.
It is also possible to design products according to one ordering scheme, and rely on software to realign the informational units if the external hardware uses a different scheme. The software could move around informational units of whatever size is necessary. This avoids the necessity of designing, manufacturing and stocking different versions of each product, but it merely moves the difficulty to the software. Different versions of each compiler, operating system or other program must be written and supported, or a single version must be written which is capable of adapting itself for use with more than one ordering scheme. The latter solution can be extremely complicated to implement and can, under certain circumstances, result in intolerable overhead for software-managed data realignment.